synthesizing altera design, with altera megafunction, using synplify

Altera_Forum · ‎10-02-2015

hi,

i was trying to synthesize a design using synplify_pro by firing it from within quartus. i specified the correct bin location and specified synplify_pro as the tool in quartus settings.

when i compile my design, i get an error message for the Altera IOPLL IP saying - Error: Synplify Pro Error: @E: CG596 :"....._pll/altera_iopll_150/synth/fast_pll_altera_iopll_150_h2h6mzy.v":38:3:38:21|Parameter clock_name_global_8 cannot be found in module altera_pll.

however when i compile the same design using quartus itself, the design compiles properly.

since Altera IOPLL is an IP, please let me know how it can be compiled using synplify from within quartus?

do i need to include some specific file in the quartus files/synplify files? currently, for IOPLL I have the following files included -

>....._pll.qsys

>fast_pll/synth/fast_pll.v

>fast_pll/synth/fast_pll.cfg

>fast_pll/altera_iopll_150/synth/fast_pll_altera_iopll_150_h2h6mzy.v

help!!! :)

z.

Altera_Forum · ‎11-09-2016

Hello Zubin_kumar,

I'm facing the same issue with a different IP. Could you please post the solution if you have already fixed it?

thanks,

pcs