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Hi,
I would like to use the ALTASMI_PARALLEL and the EPCS Serial Flash controller with QSYS use in one project. But when I compile the fitter does give an error: asmi:asmi_inst|asmi_altasmi_parallel_5rv1:asmi_altasmi_parallel_5rv1_component|wire_stratixii_asmiblock2_data0out Probably because both component want to be connected to the EPCS flash interface. I'm usign the EPCS Serial Flash Controller for the NiosII to load the executable from flash, and I'm usign the ALTASMI_PARALLEL with REMOTE_UPDATE module for firmware update functionality. I need the ALTASMI_PARALLEL to verify the POF and read a small part of the EPCS to verify if it is safe to load the application FPGA image. The NiosII in the factory FPGA project is used to receive new firmware from the host system and write it to flash, to do this and to load the executable from the EPCS I need the EPCS controller instantiated in the NiosII. With the EPCS controller in the NiosII I can select to connect the EPCS interface to the toplevel, however this is not possible with the ALT_ASMI_PARALLEL. Maybe it is possible to hack the toplevel verilog file generated by the Megawizard? I'm usign a Stratix III.Link Copied
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On some FPGA families those connections are hardcoded and can't be modified. Can't you do this integrity check and remote update from the Nios CPU instead? There is a remote update component available in SOPC builder/QSys.
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There is no REMOTE_UPDATE available for Stratix III in the NiosII with QSYS or SOPC builder.
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Yes you are right, it seems that this component only exists for the Cyclone III... It's rather odd, especially since it doesn't look so hard to encapsulate the remote update Megawizard IP your own SOPC component. This is what I would do (or if you don't feel comfortable with designing your own component, use PIOs to connect the SOPC system to the megafunction)
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I wanted to post my solution for now.
I've written my own interface NiosII interface to the ALT_REMOTE_UDPATE module. With this module I can set the "Application Base Address", "WatchDogTimer TimeOut value" and can make a trigger to switch to the application address. Within my NiosII I can read from the EPCS device by using the EPCS controller. I also made a Service Request at Altera to ask support to implement the ALTASMI_PARALLEL together with Nios II EPCS Serial Flash Controller, however they can not help and say it is not possible.- Mark as New
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Found a solution!
Thanks to a Altera SR I've been able to implement the ALT_ASMI parallel module together with the EPCS controller of the NiosII. I will shortly describe how I achieved this: 1. Export EPCS interface from NiosII to toplevel 2. Hack the ALT_ASMI_PARALLEL module, disconnect the stratixiii_asmiblock and connect the EPCS signals to the toplevel 3. Instantiate stratixiii_asmiblock in the project 4. Make a multiplexer that switches between the NiosII and the ASMI parallel module, you can use the busy signal of ASMI parallel. Make sure that not both modules are accessing the flash at the same time.
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