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which is better clock for FPGA Max10M16DCU324

XQSHEN
Novice
213 Views

1) use clock oscillator with LVCMOS connect to clock input pin p directly.

2) use LVDS oscillator as Microchip DSA1103 connect differential input with 100ohm + capacitor in clock input p +n 

 

which is better way?

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1 Solution
EngWei_O_Intel
Employee
185 Views

Hi there

 

Intel FPGA support both single ended and differential clock input. There are different factors to be considered such as application, board design and etc, it is subjective to comment which is better.

 

Thanks.

Eng Wei

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2 Replies
EngWei_O_Intel
Employee
186 Views

Hi there

 

Intel FPGA support both single ended and differential clock input. There are different factors to be considered such as application, board design and etc, it is subjective to comment which is better.

 

Thanks.

Eng Wei

EngWei_O_Intel
Employee
145 Views

Hi there


Since there's no response from you to the previous reply that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Eng Wei


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