Accroding to the specifications, the Intel Server Board S1200BT Family supports both Xeon E3-1200 and Core i3 CPUs.
The ARK shows that Xeon E3 has a max 20 of PCIe lanes and Core i3 has only 16 PCIe lanes:
Here is the block diagram of this motherboard below:
16 PCIe lanes are already used by Slot 4, Slot 5 and Slot 6.
So, what will happen when I install a Core i3 CPU on S1200BTL motherboard?
Will the Mezzanine Module slot still avaliable?
Thanks for reply! But what does "lanes are handled by the BMC directly" mean?
You mean that the PCIe Gen2 x4 lanes are first connect to the BMC, then the BMC route these lanes to the mezzanine module slot?
Like this? That is really weird!
Even though, it doesn't answer my question. Let's assuming the PCIe Gen2 x4 lanes are first connect to the BMC,
i3 has only 16 PCIe lanes and they are already used by Slot 4, Slot 5 and Slot 6.
So where does the extra PCIe Gen2 x4 lanes come from?
I apologize for the misunderstanding on your inquiry.
In order to take advantage of the mezzanine slot, you will need to leave one of the PCIe slots free indeed as you stated.