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I already asked this in virtualization section but haven't got an answer or even a hint.
What is the function of bit 3 in MSR 0x3A for Core 2 Duo mobile CPUs?
Software Developer's Manual and BIOS Writer's Guide both say that the bit is reserved but I have found code in my BIOS which is setting that bit based on some condition. I want to know what feature that bit controls.
コピーされたリンク
- 新着としてマーク
- ブックマーク
- 購読
- ミュート
- RSS フィードを購読する
- ハイライト
- 印刷
- 不適切なコンテンツを報告
I already asked this in virtualization section but haven't got an answer or even a hint.
What is the function of bit 3 in MSR 0x3A for Core 2 Duo mobile CPUs?
Software Developer's Manual and BIOS Writer's Guide both say that the bit is reserved but I have found code in my BIOS which is setting that bit based on some condition. I want to know what feature that bit controls.
IA32_FEATURE_CONTROL is primarily used by BIOS to pre-configure various platform features such that system executives can expect relevant hardware capability to be invariant until next boot. Bit 3 provides the BIOS pre-configuration portion of a mechanism to provide SMRAM protection. The SMRAM protection capability is provided via a pair of MSRs and is documented in Vol. 3B of the latest manual (Appendix B).
- 新着としてマーク
- ブックマーク
- 購読
- ミュート
- RSS フィードを購読する
- ハイライト
- 印刷
- 不適切なコンテンツを報告
IA32_FEATURE_CONTROL is primarily used by BIOS to pre-configure various platform features such that system executives can expect relevant hardware capability to be invariant until next boot. Bit 3 provides the BIOS pre-configuration portion of a mechanism to provide SMRAM protection. The SMRAM protection capability is provided via a pair of MSRs and is documented in Vol. 3B of the latest manual (Appendix B).
Thanks, I suspected it was some additional feature. Now if I only new which SKUs support it...
