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Alpha release of the Glasgow Pascal compiler for the MIC

Alpha version of Vector Pascal for the Xeon Phi now released on sourceforge For the Intel MIC (Xeon Phi)
The compiler works as a cross compiler on the host machine. The compiler
flag you must use is -cpuMIC to generate code for it. 
You need to have the intel MPSS package installed and you need
to set up a pair of symbolic links on your path to the mic assembler and
and mic gcc compilers. The Pascal compiler expects a mic version of
the gnu assembler to be on its path with the name mic-as and a mic version
of the gcc compiler with the name mic-gcc.

At present it supports multi-core operations but does not yet exploit the new
MIC SIMD instructions. We expect to release on supporting SIMD in a month or two.

There were difficulties encountered due to the absence of detailed documentation
for the assembler intel release for the chip. It was a matter of trial and error to
discover its syntax. At least one bug exists in the version of the assembler we got :
it generates the wrong code in one instance.

Beyond this many of the instructions that intel introduced since the original Pentium
have been deleted which caused some problems, we have had to revert for this
processor to very basic IA-64 instructions. In particular there is no truncate 
instruction, no conditional move instructions and some restrictions on stack
addressing. The absence of a truncate instruction means we have had to revert
to using a subroutine for this operation.

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Sourceforge link is well and truly out of date. Try this one: