Efficient use of i7 processor cores

[Paul_G_2]

My company needs to generate some high speed digital signal processing software for Gen5 i7 processors. Is there any language or development environment that generally produces more efficient processor core utilization code? Does the choice of a language these days really make a significant difference?

[jimdempseyatthecove]

If you want to attain the best performance, and are willing to put in the programming effort, then consider using Intel C++ together with the intrinsics for SSE, AVX, AVX2, and soon AVX512.

If your code is more general in nature and relying on available library functions (e.g. for FFT) then your language choice will be driven more by what the library supports.

Any new application will likely be a mixture of languages: one for presentation (user interface) and one for back-end (signal) processing.

Jim Dempsey

[TimP]

C and c++ are normally used for such purposes although performance requires more attention and work than it might e.g. in Fortran.

[SergeyKostrov]

>>Is there any language or development environment that generally produces more efficient processor core utilization code? By default No. Some tune-ups are always needed, especially in cases of Data Intensive applications ( like yours ) when explicit threads affinity management is needed. >>Does the choice of a language these days really make a significant difference? Yes, if codes are implemented in C with a thin layer of C++ the overall performance of an application is usually higher if compared to, for example, the same implementation in C#, or Java, or Visual Basic. Take into account, that higher level programming languages generated by IDEs have more overheads, codes are bloated, etc. However, even if codes are implemented in assembler it does not guarantee that Top Performance will be achieved because some software implementations that achieve Peak of Hardware Performance could be slower (!) when compared to some software implementations based on application of a superior algorithm(s) and implemented in C. What I wanted to say that a Peak of Hardware Performance ( let's say implementation is in assembler ) is Not always higher then Peak of Algorithmic Performance ( let's say implementation is in C with a thin C++ layer ).

[SergeyKostrov]

[ Correction ] >>... >>Take into account, that higher level programming languages generated by IDEs have more overheads, codes are bloated, etc. >>... ... Take into account, that binary codes generated by IDEs when higher level programming languages ( C#, Java, VB, Fortran ) are used have more overheads, codes are bloated, etc. ... Note: Don't even consider Fortran in case of time-critical DSP solutions.

[SergeyKostrov]

If you really want to see two examples of efficient and in-efficient uses of processor cores then take a look at "Intel Clusters and HPC Technology Forum" and a thread is: *** HPC and Magic of OpenMP thread Affinity Management: Compare performance when it is Not Used and Used... *** http://software.intel.com/en-us/forums/intel-clusters-and-hpc-technology/topic/595970 Let me know if you have any questions.

[Bernard]

I cannot speak of using Fortan in Time-Critical DSP software, but if you need highly accurate math routines Fortran is way to go. You can create wrappers around e.g QUADPACK subroutines and obtain very precise results up to ~13-15 digits of precision when compared to Mathematica 8 NIntegrate routine.

[SergeyKostrov]

>>...You can create wrappers around e.g QUADPACK subroutines and obtain very precise results up to ~13-15 digits of precision... It is hard to believe that in DSP world somebody will need a precision of calculations to ~13-15 digits. In many cases a DSP processing needs to be done as quickly as possible and a set of mathematical functions provide a significantly less precision.

[Bernard]

I was not talking specifically about the home appliances DSP world. On the other hand I suppose that in the realm of hard real-time system like in the  Radar signal corellation circuitry when you are dealing with the S/N ration at the level of 1.0e+9 precise integration will be surely implemented.

[SergeyKostrov]

>>I was not talking specifically about the home appliances DSP world. On the other hand I suppose that >>in the realm of hard real-time system like in the Radar signal corellation circuitry when you are dealing >>with the S/N ration at the level of 1.0e+9 precise integration will be surely implemented. That is possible but that Radar-related stuff could be classified and we will never know exact details about accuracy of some computations.