FRSTOR Floating-Point Exceptions

[Ryan_R_]

I am writing an RTOS and I have some questions about Floating-Point Exceptions generated by the FRSTOR instruction.

The Intel® 64 and IA-32 Architectures Software Developer’s Manual  Volume 2 says that the FRSTOR instruction "might unmask an existing exception that has been detected but not generated, because it was masked. Here, the exception is generated at the completion of the instruction." I have 2 questions related to this:

1) What address will the EIP be when the exception occurs (the FRSTOR instruction or next instruction)?

2) How do I cause the exception to occur? I have tried several different ways to get FRSTOR to generate an exception based on the restored data and no matter what I do the exception is not raised until the floating point instruction after the FRSTOR, that does not appear to match what is described in the manual.

[SHIH_K_Intel]

I interpret the documentation (probably written some 20 or 30 years ago) is trying to say something like:

Say an FADD instruction would produce an overflowed result, but with exception masked, when the FADD instruction retires, #O will not be raised, even the hardware do detect the overflow condition. But if FRSTOR restores a state image that would unmask exception reporting. When the FRSTOR retires, #O will be raised.

In other words, the overflow condition caused by FADD was detected, and FRSTOR (does not do any FP computation) did not cause any overflow condition, but FRSTOR is the one reporting the exception.

I didn't use the word "occur" you seem to prefer, as I'm not sure which phase you meant.