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According to https://software.intel.com/en-us/articles/intel-xeon-phi-coprocessor-vector-microarchitecture:
all memory operands in this ISA have an optional attribute called the eviction hint (EH hint) to indicate that the data is non-temporal.
Is it possible to set this hint for ordinary vector load operations? Intel intrinsics seem to support this hint only for some functions (e.g. _mm512_extload_epi64), but not for ordinary loads such as _mm512_load_epi64. If it is not possible with intrinsics, how do I encode EH hint into inline assembler using the vmovdqa64 instruction? It's a part of the MVEX instruction prefix, but I haven't found any help how to use this prefix in inline assembly code.
UPDATE
I found out that I could use _mm512_extload_epi64(ptr, _MM_UPCONV_EPI64_NONE, _MM_BROADCAST64_NONE, _MM_HINT_NT). However, will this generate the vmovdqa64 instruction or vbroadcast...?
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