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I have two 10G NIC and would like to redirect all the traffic to the Xeon phi where some native multithreading application is running there.
Does the existing Xeon phi protocol stack API supports such high traffic rate (20Gbps ~ 40Gbps)?
On Xeon we could run DPDK. But I am not sure whether Xeon Phi can do something similar to handle high traffic rate and send back to the host.
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Intel(R) Data Plane Development Kit (DPDK) has been used mainly on Xeon processors to enhance packet processing performance. Not sure if it supports Xeon Phi(TM) coprocessor.
Withoiut DPDK, L3 forwading for the 2.40 Ghz Intel Xeon processor E5645 on a native Linux stack is about 1 Mpps per core (64 byte packets), that is 64 Mbps. If I assume the same performance on Intel(R) Xeon Phi(TM), then I can see the maximum traffic rate is about 3.8 Gbps. Thank you.
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