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In the code snippet below; mwait takes a UD. Note that mwait is executed without a monitor (I think this should be ok since without a monitor mwait should just move to the next instruction). Does anybody know what needs to be done to execute MWAIT successfully at non-zero CPL?
Code snippet:
//CPL = 0
int 1; -> software interrupt
jump to handler;
after_iret:
//CPL = 3
mov ecx, 0
mwait --> this results in UD
handler:
manipulate stack image for CPL = 3
iret
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Our engineering contacts recommend that you refer to the Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A: Instruction Set Reference, A-M.
Page 630 (Nov 2006 version) states:
The MONITOR CPUID feature flag (ECX bit 3; CPUID executed EAX = 1) indicates the availability of MONITOR and MWAIT in the processor. When set, the unconditional execution of MONITOR is supported at privilege levels 0; conditional execution is supported at privilege levels 1 through 3 (test for the appropriate support before unconditional use). The operating system or system BIOS may disable this instruction by using the IA32_MISC_ENABLES MSR; disabling MONITOR clears the CPUID feature flag and causes execution to generate an illegal opcode exception.
The instructions operation is the same in non-64-bit modes and 64-bit mode.
Essentially, this says that the instruction will not work at ring 1,2,3, asyou observed. There is not a way to enable the instruction.
==
Lexi S.
IntelSoftware NetworkSupport
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First, if he already has the ability to run part of his code in CPL0 he can re-enable the MONITOR/MWAIT by setting bit 18 in MSR 0x1A0 to 1.
Second, you could have suggested why BIOS might have disabled MONITOR/MWAIT -- it could be because Max. CPUID level limit is set to "Enable".

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