Modification of Instructions during execution

[minhaj_ahmad_khan]

Using IA-64 processor, I am modifying the data in machine instructions during execution and replacing with new data values in instructions having constants e.g. add r23=45, r67 being replaced by add r23=90, r67.

After the successful modification, the following method is acquired for cache coherence.

asm volatile("fc %0"::"r"(addr));
.....
//32 bytes i.e. 2 bundles have been done. so loop for as required and at the end,

asm volatile(";;sync.i ;;");
asm volatile("srlz.i ;;");
---------------
Are these steps correct for the modification of binary instructions during execution for IA-64 architecture.

Thanks

[Intel_Software_Netw1]

We will forward your question to our engineering contacts and let you know how they respond.

Regards,

Lexi S.

IntelSoftware NetworkSupport

http://www.intel.com/software

Contact us

[Intel_Software_Netw1]

Our engineers responded that there is some documentation available with regard towriting self-modifying code. Info on what needs to be done is documented in the Intel Itanium ProcessorSoftware Developer'sManual, Volume 2: System Architecture, Revision 2.1, Chapter 2.5.x. The implementation depends on whether you are modifying on a local or remote processor.It appears that yourcode is for modifying code on the local processor. Rather than fc,our engineersresponded that you should usefc.i [future]; otherwise they said that it looks correct, but you should review the chapter in the manual above.

Thereis alsoanother document,"Cache Coherency in ItaniumProcessor Software,"that talks about the required sequence.

Regards,

Lexi S.

IntelSoftware NetworkSupport

http://www.intel.com/software

Contact us