The general consensus in the last 30 years has been that there is not enough demand for fast quad-precision (Binary128) to justify a hardware implementation. I am not aware of any research that could make this policy change in the near future.
Some IBM CPUs do support quad-precision decimal floating-point (Decimal128) in hardware. But they implement it with scalar, non-pipelined units that are orders of magnitude slower than double-precision (Binary64) SIMD units: their target is financial applications, not HPC.
When you mention there is a clear need for quad precision (or extended precision), do you have specific applications in mind? Have you considered software alternatives such as double-double arithmetic?
