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posted interrupts

Monica_K_Intel1
Employee
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Hi 

I want to understand the working of posted interrupts , have a couple of questions:

  •     /proc/interrupts have entries for PIN and PIW – My current set up has the a Altera FPGA card in a Virtual Machine generating 1000 interrupts, and I observe that PIN is around 25-40 on various cores. What does the PIN signify? 
  • Can you please explain what PIN and PIW represent for?
  • The perf kvm event - kvm_pi_irte_update , I assume it gets updated when the VT-d assigned device inserts the driver and confirms the posting , there has to be a count for trace event. In my case kvm_pi_irte_update is always zero . Can someone explain its working ad when the counters is updated.
  • Is there a way to confirm that the posting occurs? 

Thanks,

Monica

 

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Quoc-Thai_L_Intel
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Hello Monica, 
The setup with FPGA card is new.  Once I have any feedback from the experts, I will post the feedback here. 
-Thai

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Quoc-Thai_L_Intel
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I have not received any response.  However, I found an Altera* support forum that might want to check for your question. Here is the link: http://www.alteraforum.com/

-Thai

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