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I'm experimenting on cache eviction in my code using _mm_clevict(), and have the following observations:
(1) if data are evicted from L1 alone (_MM_HINT_T0), the code is slowed by ~30%.
(2) if data are evicted from L2 alone (_MM_HINT_T1), the code is slowed by ~70%.
(3) if data are evicted from both L1 and L2, the code is still slowed by ~70%.
I'm confused by (3), as I think some additional loads should miss both L1 and L2 compared to (2), which should cause further latency. Any thoughts? Thanks!
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The caches are inclusive, therefore eviction from the L2$ implies eviction from the L1$ too. Your last two cases are therefore identical (give or take the extra eviction instructions you execute!)
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The caches are inclusive, therefore eviction from the L2$ implies eviction from the L1$ too. Your last two cases are therefore identical (give or take the extra eviction instructions you execute!)

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