Software Tuning, Performance Optimization & Platform Monitoring
Discussion around monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform monitoring

Are UD2 and INT3 roughly equivalent for stopping speculation


UD2 is a 2-byte undefined instruction. INT3 is interrupt 3 - trap to debugger. It is a single byte, 0xcc.

For indirect branches, Intel recommends:

Assembly/Compiler Coding Rule 14. (M impact, L generality) When indirect branches are present, try to put the most likely target of an indirect branch immediately following the indirect branch. Alternatively, if indirect branches are common but they cannot be predicted by branch prediction hardware, then follow the indirect branch with a UD2 instruction, which will stop the processor from decoding down the fall-through path.

My question is: are UD2 and INT3 equivalent for the purpose of stopping speculation of an indirect branch at the immediate following instruction? The advantage of INT3 is that it's single byte. I use it for the padding value for aligns and at 2 bytes, UD2 is problematic.

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