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Hey,
is the model RAPL uses publicy available?
Or did by any chance someone reverse engineer it?
I'd be very interested to use it to predict power consumption of algorithms.
cheers,
Ronny
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Hello Ronny,
The only information that Intel has exposed is in the "Intel® 64 and IA-32 Architectures Software Developer’s Manual", Volume 3 (3A, 3B & 3C), System Programming Guide available http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html.
See section 14.7 "PLATFORM SPECIFIC POWER MANAGEMENT SUPPORT", page 14-19, March 2013 edition.
Pat
that and this http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5599016&tag=1
but, sadly, I didn't find anything else.
Ronny B. wrote: Hey, is the model RAPL uses publicy available? Or did by any chance someone reverse engineer it? I'd be very interested to use it to predict power consumption of algorithms. cheers, Ronny
How it could be reverse engineered? I suppose that an exact implementation is at microcode/hardware/ACPI level.
