Software Tuning, Performance Optimization & Platform Monitoring
Discussion around monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform monitoring

Diagram for Skylake-SP core?


Need a diagram of Skylake core for a presentation, but there is no official image, so I decided to draw one.

I found that there is little information about this topic on the internet, the only information I can find is a small, low-res picture in the file "intel xeon scalable processor architecture deep dive". Can't recognize all the characters in the picture, but I tried to draw a diagram accordingly. Are there any problems in this map? The part I have the least confidence about is "Execution Ports" section.

Thank you.

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