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Dear all,
Hello, This question is seemingly simple but I have trouble getting the number of sets in each LLC slice. I currently use INTEL(R) XEON(R) SILVER 4510T CPU, which has 12 physical cores.
Below is the result of "$ lscpu --cache"
Interestingly, the number of sets is 32,768 and the number of LLC slices is 12.
When I calculate the number of sets per slice with the following equations,,,
(number of sets per slice = cache size per slice / (cache line size * associativity))
number of set per slice = (2.5*1024*1024 / (64 * 15)) = 2,730.66666666
Thus, I cannot find the number of sets per slice in my CPU,
Is there anyone who can help me?
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The Skylake Xeon and Cascade Lake Xeon servers have 1.875 MiB of LLC per slice, not 2.5 MiB. Your Xeon Silver 4510T must have 16 LLC slices to provide the 30 MiB of cache. The associativity of each set is 15-way, consistent with 2048 sets in each LLC slice.
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To calculate the number of sets in each LLC (Last-Level Cache) slice, you need the following details:
- Cache Size (Total LLC size): The total size of the LLC in bytes.
- Associativity: The number of cache ways.
- Cache Line Size: Typically 64 bytes for most modern architectures.
- Number of LLC Slices: Total slices present in the cache system.
Formula:
Number of Sets per Slice = Cache Size / (Associativity × Cache Line Size × Number of Slices)
This formula helps determine the sets, which are crucial for understanding how data is distributed across LLC slices in CPUs.
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@globalkeyinfosolution ChstGPT answers are very lame.
Doc (not an Intel employee or contractor)
[Fear and the desire for control are primary motivators for shadow dwellers. ]

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