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Hi,
I'm getting Vtune traces from a system using Xeon 5140 processors.
I'm interested in getting the L1, L2 and LLC miss rates but especially on the LCC miss rate.
I'm not asking for the formula that measures the impact in terms of cycles, for example, 180 * MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS_PS) / CPU_CLK_UNHALTED.THREAD.
What I'm asking for is the formula that yields the percentage of accesses that the LLC cache could not serve and had to be serviced by the main memory (DRAM).
Could you please help providing methose formulas for a Xeon 5140?
Thanks,
Guillermo
I'm getting Vtune traces from a system using Xeon 5140 processors.
I'm interested in getting the L1, L2 and LLC miss rates but especially on the LCC miss rate.
I'm not asking for the formula that measures the impact in terms of cycles, for example, 180 * MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS_PS) / CPU_CLK_UNHALTED.THREAD.
What I'm asking for is the formula that yields the percentage of accesses that the LLC cache could not serve and had to be serviced by the main memory (DRAM).
Could you please help providing methose formulas for a Xeon 5140?
Thanks,
Guillermo
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