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Hello,
I want to ask something simple yet important for me. Is there a C-language API to use instead of the C++ API that is provided for PCM?
If not (which probably is the case), is there any way to make the C++ API provided work inside a C source file?
Thanks in advance,
Giannis
P.S. Re-write the existed code in C++ and use the API provided is not a realistic option.
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Hi Giannis,
you can look into https://github.com/opcm/pcm/tree/master/pcm.so
It provides an example that exports some of the APIs to C. Hopefully you can extend it with the calls you need.
Thanks,
Roman
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Tried to compile and run the source code (into https://github.com/opcm/pcm/tree/master/pcm.so) that you suggested but I keep getting either a seg fault if I run without any arguments provided (run ./c_example.x) or the following error if any argument is provided:
Event 'something' is not supported. See the list of supported events
I probably cannot understand the switch statement block of code so an example would be very beneficial
Thanks again,
Giannis
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Hi Giannis,
Thanks for trying. The argument syntax for c_example.x is the same as pcm-core.x. You can use ./pmu-query.py to get some example for encoding CPU counter events. It's the same syntax as Linux perf.
For example: ./c_example.x cpu/umask=0x01,event=0x48,name=L1D_PEND_MISS.PENDING/
We will update documentation soon. Thanks for your feedback.
Patrick
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Hi again guys,
your answers so far have been proved to be very helpful, so here I am to receive some more guidelines.
Straight to the point, I've extended the example in pcm/pcm.so directory in order to support cache function calls (L2/L3 hits, misses and ratios).
I've also made the necessary adjustments in pcm/pcm-core.cpp to support that functionality.
The problem is that the result is always 0 cache hits and misses.
Any thoughts on that? What could be wrong?
P.S. I hadn't been able to run pcm/pcm-memory.x (Access to Processor Counter Monitor has denied (no MSR or PCI CFG space access)), even though pcm/pcm.x and pcm/pcm-core.x run without any error.
Thanks in advance
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Giannis G. wrote:
Hi again guys,
your answers so far have been proved to be very helpful, so here I am to receive some more guidelines.
Straight to the point, I've extended the example in pcm/pcm.so directory in order to support cache function calls (L2/L3 hits, misses and ratios).
I've also made the necessary adjustments in pcm/pcm-core.cpp to support that functionality.
The problem is that the result is always 0 cache hits and misses.
Any thoughts on that? What could be wrong?
P.S. I hadn't been able to run pcm/pcm-memory.x (Access to Processor Counter Monitor has denied (no MSR or PCI CFG space access)), even though pcm/pcm.x and pcm/pcm-core.x run without any error.
Thanks in advance
Was this issue solved? I'm also getting 0 cache hits and misses.
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Dear Giannis and Friends,
Do you have any update on this topic. If I understand correctly c_example.c compiled on Linux platform. I have tried to compile on Windows using Visual studio 2017 and Clion using Mingw-w64 on both instance getting error (something missing inside ) Header files.
Please refer the attached screen shot. Any thoughts - very useful. I am struggling to get basic idea of this program. If it compiled correctly , can i use like perf (Linux) command on windows?
Many thanks.
With regards,c
handra
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