Intel PCM and L1 cache

[zeuch__Steffen]

Hi why Intel PCM (Intel® Performance Counter Monitor) does not support L1 cache counters? The interface do not provide functionality for this.

Will this be implemented in later version or can I collect/calculate these data from other samples counters?

[Roman_D_Intel]

Hi Steffen,

the default pcm.x utility uses all counters available in PMU hardware to provide the metrics. Having additional metrics would mean dropping the existing ones in pcm.x. However you can use the custom event programming interface to program your events and metrics. You can find an example for it in pcm-tsx.cpp (it shows TSX metrics instead of the default ones).

Roman

[zeuch__Steffen]

Hi Roman,

thank you for your answer I will take a look at the pcm-tsx.cpp file. One additional question. Did PCM sample all cores or all spawned threads by a process or only one core?

Best

Steffen

[Roman_D_Intel]

it counts events on all cores or/and the cores you choose.

[zeuch__Steffen]

Hi and what is the default behavior when I only get one Instance of PCM?

[Roman_D_Intel]

every pcm.x instance counts events from all cores in the system