Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
1790 Discussions

LLC Prefetch

countingStars
Novice
‎05-14-2025 01:46 AM
2,389 Views
I recently learned about the LLC prefetcher for the intel Xeon processor family and read in the "4th Gen Intel® Xeon® Scalable Processor XCC (Codename Sapphire Rapids) Uncore Performance" manual about the LLCPrefData and the DRd_Pref and other prefetch events, I would like to know if the essential difference between these 2 events is that they prefetch to different destinations, i.e. to LLC and L2 cache respectively? Will these 2 events overlap (i.e. is it possible that an LLCPrefData request will be converted into a DRd_Pref request or something like that)? I've been monitoring the throughput of these 2 events lately and noticed that the throughput for the DRd_Pref event looks odd when LLC Prefetch is abled.
0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.