PCM uses events and masks that I couldn't find in specs. Then where?

[Alexander_Alexeev]

Hello

Could sombody clarify what specs should I use to find a reference on events and mask used in PCM. Although it sent me to ""Intel(r) Xeon(r) Processor 7500 Series Uncore Programming Guide" I couldn't find it there.

e.g. Types.h

// Uncore msrs
#define MSR_UNCORE_PERF_GLOBAL_CTRL_ADDR        (0x391)
#define MSR_UNCORE_PERFEVTSEL0_ADDR             (0x3C0)

#define UNC_QMC_WRITES_FULL_ANY_EVTNR           (0x2F)
#define UNC_QMC_NORMAL_READS_ANY_EVTNR          (0x2C)
#define UNC_QHL_REQUESTS_EVTNR                  (0x20)

Thanks,

Alexander

[Bernard]

Maybe these 2 MSR registers are mentioned in ISDM?

[Patrick_F_Intel1]

Yes, see the SDM vol 3, section 18.6.2.1 Uncore Performance Monitoring Management Facility. The MSR names are slightly different in the SDM.