I recently ran some simple experiments to study the processor power consumption (RAPL package domain power) of LAMPPS and GROMACS on a server having Intel Sandybridge E5-2670 in a dual socket setup.
The CPU utilization is negligible throughout the execution of both of these applications. But the power consumed by the processor package peaks at around 35W and the package power consumption profile looks like a DC shifted version of the DRAM access bandwidth (in MB/s) profile. They have a very high correlation factor.
In other words, the processor power consumption (35W max.) looks like its entirely originating from DRAM access while CPU utilization remains really low (~0) throughout.
I checked and it doesn't look like I am making any mistakes. But how do I explain it??!!
It is hard to understand what you mean when you say that you are running the applications and still have negligible CPU utilization. Are these multi-threaded or otherwise parallel codes? Are the benchmarks IO-limited?
The Xeon E5-2670 is a 115W part. A maximum power consumption of 35W suggests you are only using one core. In periods of less than 35W power consumption, you are probably not using any cores (due to IO waits?), and the DRAM is probably going into a low-power mode.
It is hard to understand DRAM power consumption on Intel processors at low utilization levels because it is hard to tell which DRAM power-saving mechanisms are in use, or what controls them. Sometimes an "idle" (from the user's perspective) socket will have very low DRAM power consumption (e.g., <1W), and other times it will be higher (>1W), with no obvious correlation with user-controllable factors. The only way I know how to diagnose this is with a logical analyzer and a DRAM DIMM interposer, but I don't have access to those expensive toys in my current job...