I am trying to port some code base relying on the MSR_UNC_CBO_x_... performance counters to support more recent CPUs of the coffee lake architecture, such as the i9-9900.
MSR_UNC_CBO_CONFIG ( 396H) answer 0x8, indicating 8 CBOs have performance counters (which is consistent with the 8C 16T the cpu has) , however the SDM volume 4 table 2-40 only gives the MSR for the first 4 counters.
Has anyone a clue of where can I find the proper documentation for the remaining 4 other counters ? Or is the Intel documentation outdated and incomplete ?
I believe that the i9-9000 series are based on the "server" uncore. Check the Family/Model information -- if it is 06_55H (CPU Family 6, model 85), then the counters should be the same as those documented in the Xeon Scalable Processor Family Uncore Performance Monitoring Reference Manual (document 336274 -- link available near the bottom of https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html
Thanks for your answer, but unfortunately the i9 9900 is family 6 model 158, (6_9E).
Through trial and error I have found the MSR to control the performance counter for CBO 4, 5 and 6 but 7 is nowhere to be found. With the documented one for CBO 0-3 being 0x700, 0x710, 0x720 and 0x730, I verified that 0x740, 0x750 and 0x760 behaved like the performance counters I was looking for hut however there is another unrelated MSR lying in the range 0x770 where the last performance counter MSRs would logically be.
If anyone has an idea of whether it simply does not exist, or if it is somewhere else, I would be interested in an answer.