i'm working on QPI interconnect system design, i'm puzzle about how the processor determine the qpi command(rddata, rdinvown, etc..) for a data access? any reference doc?
for a certain cache line, if it is accessed by rdcode, is it possible this cache line accessed by rddata/rdinvown/etc... in the future?
This forum focuses on software (and how it operates on hardware).
However, I don't think that the details of QPI are publicly documented. Therefore, my recommendation is to contact your Intel representative and ask for documentation.