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Stratix III wierd JTAG Config problem

Altera_Forum
Honored Contributor II
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I've got 2 Stratix III devices in a JTAG chain. 

 

If I power the board, I can scan the chain OK and program repeatedly but as soon as I switch off the power and re-apply, JTAG no longer works. i.e. I cannot even scan the chain. 

 

If I leave the board for about an hour or thereabouts, it's OK again. 

 

It doesn't look like it is temperature related because the board only has to be power up briefly for this fault to occur. 

 

Any ideas where to look? I've examined the circuitry pretty thoroughly and cannot see a wiring or missing pull-up/down anywhere. 

 

Regards, 

Dave.
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Altera_Forum
Honored Contributor II
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Try the following. 

 

Close the Programmer software. 

Disconnect the JTAG cable from the board. 

 

Power cycle the board - wait 10 seconds or more between off and on. 

 

Re connect the JTAG connector (to the board). 

Re launch the Programmer software. 

 

Report your findings.
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Altera_Forum
Honored Contributor II
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Hi, thanks for answering. 

 

No joy, I'm afraid. Still the same...
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Altera_Forum
Honored Contributor II
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Power supply issues? This is a strange one. 

 

Can you power up the board and not program... then cycle power and program? 

 

Try to see if the problem is dependent on the power cycle or the programming.
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Altera_Forum
Honored Contributor II
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Usually, an unacessable JTAG chain is caused by any of the supply voltages monitored for power-on-reset is below it's specification. These are with Stratix III: VCC, VCCL, VCCPT, VCCPD and VCCPGM. Although this is prerequisite for performing boundary scan testing, the supply voltage conditions aren't mentioned in BST chapter of device handbooks. 

 

Or the JTAG chain itself has an inappropriate wiring.
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Altera_Forum
Honored Contributor II
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I'm sure it's a layout problem because it seems to be affected by temperature i.e. if I apply a short squirt of freeze-it spray and reboot, I can see the chain. I'll take a look at the PCB plots. 

 

Thanks for the responses.
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Altera_Forum
Honored Contributor II
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Due to the die shrink, Stratix III I/O voltage must be <= 3.0V for JTAG Configuration to work stable.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Due to the die shrink, Stratix III I/O voltage must be <= 3.0V for JTAG Configuration to work stable.  

--- Quote End ---  

 

The most recent V1.4 Stratix III handbook clarifies: 

--- Quote Start ---  

JTAG output pin TDO and all JTAG input pins are powered by the 2.5 V/3.0 V/3.3 V VCCPD. 

--- Quote End ---  

 

Please notice, that the IO- and configuration voltage specification has considerably changed between Handbook versions. It seems to me, that the previous 3.0 V restriction was motivated by doubts regarding possible damage by overvoltage, but application (e. g. related to AS configuration that effectively needs 3.3 V) and also customer requirements finally got the upper hand. I have, however, no own experience with Stratix III, but I would be suprized if 3.3V JTAG isn't operational.
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Altera_Forum
Honored Contributor II
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JTAG configuration voltage can be 3.3V, but Stratix III I/O voltage must be <= 3.0V.

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Altera_Forum
Honored Contributor II
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I think you need to read the latest datasheet from Altera. 

 

Stratix III devices are 3.3V I/O standard compatible. They were initially specified as not tolerant of 3.3V I/O standards (and required external protection if interfacing to such I/O) but the datasheet has since been updated (presumably following evaluation and testing of prototype devices).
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Altera_Forum
Honored Contributor II
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I have posted this to another thread, maybe it is also relevant to this one: 

 

... I seem to have similar problems. I use JTAGTest (http://www.jtagtest.com/) with ViaTAP interface ( http://www.jtagtest.com/viatap ). Program says "no devices detected in JTAG chain" ... and nothing else. 

 

For other boards with JTAG parts I have it works fine. I can post my schematics somewhere if needed. 

 

I really need to use JTAGTest with Stratix to verify solder joints ... 

 

Would anyone confirm that Stratix meets "Design guidelines for use with ViaTAP" in ViaTAP JTAG HW manual at http://www.jtagtest.com/docs ? I did not see anything wrong in Stratix PDF docs. 

 

It definitely works fine with Cyclone or Max/MaxII (tested), but this is my first Stratix design... 

 

Thank you!
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Altera_Forum
Honored Contributor II
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i have the same problem on 3 prototype StratixIII boards. We use EP3SL340F1517C3N on own-designed board. 

 

When VCCPGM is below 3.27V the JTAG chain is not detected. 

When VCCPGM is over 3.28V, upto 3.75V, the JTAG communication and EPCS programming works fine! 

 

Please let me know if you can reproduce this. I am busy with Altera Support issue to get this resolved, but we are not making much progress here.
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