Constant Multiplier by LUT

[Altera_Forum]

Hi,  

Any idea how Konstant Coefficient Multiplier (KCM) is implemented in CycloneII? I wish to have an equation to predict size and delay of KCM. It seems like Quartus doesn't map as Chapman algorithm. Number of LUTs is larger than Chapman's equation. Any idea is much appreciated :) Thanks :) Jeff

[Altera_Forum]

I don't think that chapman algorithm is general knowledge in digital signal processing. Can you give a reference?

[Altera_Forum]

Agree with you! (I was hasty to compare with Chapman algo because that algo is simple and it gives less resource consumption <in theory>) 

But is there a quick way to predict size/speed of a filter? +One more question: I've tried a couple of designs and the observation is that:  The size of my Multiplier in my DSP circuit is much smaller than (~1/2) size of that multiplier when i synthesize the multiplier alone, separately. (they are multipliers with same constant value, same input/output bitwidth).  Do you have any idea why? (I guess it's related to logic optimizations).:confused:  Thanks a lot  Jeff

[Altera_Forum]

--- Quote Start ---  The size of my Multiplier in my DSP circuit is much smaller than (~1/2) size of that multiplier when i synthesize the multiplier alone, separately.(...)I guess it's related to logic optimizations.  --- Quote End ---   Yes, I think so. You can examine in netlist viewers, where the multiplier logic is hidden. Part of the logic is probably placed in target register LE. When predicting number of logic terms, did you consider limited number of inputs with existing LEs?

[Altera_Forum]

--- Quote Start ---  Yes, I think so. You can examine in netlist viewers, where the multiplier logic is hidden. Part of the logic is probably placed in target register LE. When predicting number of logic terms, did you consider limited number of inputs with existing LEs?  --- Quote End ---    Yes, you are right, some of LUT are merged into the target Registers (but the sum is still smaller than number of LUTs obtained by synthesizing Multiplier alone. <The logic synthesis ignores obtimization when circuit is too small compared to FPGA size, possible?????> ) I'm trying to predict for Cyclone at the moment. Of course it's great if prediction can be applied for other Family as well.  Thanks a lot Jeff

[Altera_Forum]

hi, i hope you are well i'm here to ask you to provide me the vhdl code of Konstant Coefficient Multiplier (KCM) for 8bit with 5 coefficient (signed and unsiged)plzzz i'm working on it and i have no idee about it. in short,i galley 

 and i would be really gratful if you help me with this ,i hope i find a response from you