calculator arcsin(x)

[Altera_Forum]

Everyone can help me calculator arcsin(x) by VHDL. thanks!

[Altera_Forum]

One method is LUT based(other cordic possibly, not sure?) 

LUT can be useful for many mathematical functions.  Decide data resolution(bitwidth) and LUT resolution(how many values). Get say 1024 values of arcsin and arccos from a software tool(Matlab ...etc). The LUT values to cover the range for one cycle(pointer range 0 to 1023).   Then address the table with your input value and compute the arcsin from nearest table value + a difference derived from your input value remainder and arccos(i.e. interpolate the function to get new point).  By remainder, I mean if your value = 31.723 then your nearest LUT value is the table value at 31(nearest towards 0) and the remainder is .723.  What is left is add a value derived from effect of this remainder and using the arccos as indicating the rate of change(function is not linear). There are various techniques of this interpolation itself...  See DDS methodology(same principles, DDS computes uses full LUT or small LUT + interpolation, it can also be done in cordic version).

[Altera_Forum]

or, if you dont want to synthesise it, use the arcsin(x :real) function from the ieee.math_real package.

[Altera_Forum]

Indeed, VHDL was designed for simulation only when it started. Then it was realised that it can be done for synthesis, great inventions started from garage and kitchen work... 

 By the way the netlist language(edif) was invented by two drunk engineers in a pub? really

[Altera_Forum]

but if we use LUT that mean we processing with real type? so quartus II don't support real type. everyone help me?

[Altera_Forum]

LUT to be in 2's complement(signed) as usual. 

You convert real from software tool to integers for LUT as usual

[Altera_Forum]

forget about real/floating point types. instead think about fixed point. 

 Floating point could be done, but the address part of the LUT would still have to be fixed point. And then with 32 bit results in the LUT (for FP) you'll have a large LUT.  Go to fixed point instead.

[Altera_Forum]

you can send for me a example code write by vhdl in case?

[Altera_Forum]

but how command in vhdl support convert real to integer and it can synthesised?

[Altera_Forum]

--- Quote Start ---  but how command in vhdl support convert real to integer and it can synthesised?  --- Quote End ---    to cast from real to integer:  signal r : real; siganl i : integer;  begin  i <= integer(r);  But no, it cannot be synthesized. real types CANNOT be synthesised at all. forget about real types. specify a fixed point type you can use instead. Look at this package:  http://www.vhdl.org/fphdl/vhdl.html  It does support floating point (arrays of bits, not real type) but I wouldnt try and synthesis floating point. You'll have a very slow clock.

[Altera_Forum]

For a selection of suitable methods, you should specify your intended resolution, number format and design constraints (speed or resource usage optimzed).

[Altera_Forum]

--- Quote Start ---  (other cordic possibly, not sure?)  --- Quote End ---   i would look into CORDIC methods.