Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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TimeQuest sdc problem

Altera_Forum
Honored Contributor II
‎05-02-2008 02:58 PM
1,082 Views

Hi, 

in my design I have a number of PLLs which are merged into one. The problem is that the particular instance which appears in the netlist following compilation moves around. Sometimes it is one and sometimes another. This causes difficulty in my sdc file because I have to set a clock group but can't reliably predict which one will appear in the netlist. 

 

Is there a way to get at the correct instance without having to report clocks every time I compile? 

 

Thanks and regards, 

Dave.
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