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interrupt for pci ip core

Altera_Forum
Honored Contributor II
‎06-19-2008 11:02 AM
1,172 Views

Hi,  

 

i create a pci t32 project with sopc builder, 

 

the bars i used are:  

0: prefetachable for on-chip ram access 

1: non-prefetachable for csr access. 

 

now i can read/write on-chip ram. 

 

and when i write to csr's 0x40 from pci host, it works ok too.  

 

but when i read csr's 0x50/0x40 from pci host for interrupt information, it hange. 

 

The host system is amd lx800, w/ quartus 8.0 could anyone help me?
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Altera_Forum
Honored Contributor II
‎06-20-2008 03:22 AM
263 Views

The solution for 7.2 is 

 

http://www.altera.com/support/kdb/solutions/rd04242008_431.html 

 

but how could i do in quartus 8.0
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Altera_Forum
Honored Contributor II
‎06-20-2008 03:24 AM
263 Views

by the way,  

 

how could i share the interrupt in pci module which generated with sopc builder?
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