"Design" Posts in "Intel® Quartus® Prime Software"

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	Bug: Import of QDB file partition fails in Quartus Pro versions that use DNI by roeekalinsky Valued Contributor I in Intel® Quartus® Prime Software 04-04-2024 0 18	0	18
	Can DNI still be disabled? by roeekalinsky Valued Contributor I in Intel® Quartus® Prime Software 01-03-2024 0 11	0	11
	Quartus 13.0 SP1 no available devices by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 06-13-2023 0 4	0	4
	Internal Error: Sub-system: QSYN, File: /quartus/synth/qsyn/qsyn_cmd.cpp, Line: 1803 by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 11-17-2022 0 10	0	10
	Quartus Pro 21.1 Error in generating emif s10 example design by aegeus Novice in Intel® Quartus® Prime Software 03-07-2022 0 13	0	13
	Nios II Console only displays the first printf statement by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 11-04-2021 0 3	0	3
	AOC compile error by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 09-13-2021 0 2	0	2
	Quartus Lite 11.0sp1 Installer by Joseph_here Beginner in Intel® Quartus® Prime Software 08-06-2021 0 4	0	4
	Gray out the checkbox "Erase" and "Examine" by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 06-23-2021 0 3	0	3
	How to ignore simulation only ports when mapping to FPGA pins? by MoZdk New Contributor I in Intel® Quartus® Prime Software 05-29-2021 0 2	0	2
	Modifying the a10_ref OpenCL BSP Error by SSFyTMT Novice in Intel® Quartus® Prime Software 10-31-2020 0 4	0	4
	Design partition: Error (18999): Placement cannot find a legal solution. by Yogesh Novice in Intel® Quartus® Prime Software 10-08-2020 0 5	0	5
	context callback:emulator:could not allocate runtime data! by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 09-24-2020 0 1	0	1
	OpenCL based Convolutional Neural Network template by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 09-17-2020 0 2	0	2
	Compiling and Linking Your Kernels or Object Files without Building Hardware (-rtl) which don't work ! by caron Beginner in Intel® Quartus® Prime Software 06-09-2020 0 6	0	6
	Why does Cyclone 10 LP FPGAs not have a fast and warm corner in the multi-corner timing analysis in Quartus? by MoZdk New Contributor I in Intel® Quartus® Prime Software 05-14-2020 0 4	0	4
	How to compile different revisions (with the same top level) of the same project in parallel? by KAthu Beginner in Intel® Quartus® Prime Software 05-11-2020 0 2	0	2
	Synthesizing design for PAC with Arria 10 GX fails by RBash Novice in Intel® Quartus® Prime Software 05-11-2020 0 38	0	38
	Writing a host application that does not need to reprogram the FPGA by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 05-05-2020 0 7	0	7
	How to launch replicated Single Work-Item Kernels (using num_compute_units) by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 05-02-2020 0 2	0	2
	I can't install devices (Quartus 17.0 prime lite edition) by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 04-18-2020 0 3	0	3
	Can I change weak pull up status of a FPGA pin during runtime? by KAthu Beginner in Intel® Quartus® Prime Software 04-17-2020 0 5	0	5
	What is the most efficient way to configure different weak pull ups for the same design to create different bitstreams? by KAthu Beginner in Intel® Quartus® Prime Software 04-14-2020 0 1	0	1
	unable to open the device acl0 when using aocl program command by Altera_Forum Honored Contributor II in Intel® Quartus® Prime Software 03-03-2020 0 7	0	7
	Utilization Report by Entity missing by JSwif Beginner in Intel® Quartus® Prime Software 01-20-2020 0 3	0	3