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AleCampla
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About AleCampla
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Posted
S10 MX PHY: signal rx_is_lockedtodata unstable during hardware test
on
FPGA, SoC, And CPLD Boards And Kits
.
09-03-2020
08:20 AM
Posted
Re: Re:QSFP module on Stratix10 MX dev kit
on
FPGA, SoC, And CPLD Boards And Kits
.
09-03-2020
07:41 AM
Posted
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
on
FPGA, SoC, And CPLD Boards And Kits
.
09-03-2020
07:37 AM
Posted
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
on
FPGA, SoC, And CPLD Boards And Kits
.
07-23-2020
08:24 AM
Posted
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
on
FPGA, SoC, And CPLD Boards And Kits
.
07-23-2020
07:03 AM
Posted
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
on
FPGA, SoC, And CPLD Boards And Kits
.
07-23-2020
12:21 AM
Posted
Stratix 10 1G/2.5G Ethernet reconfiguration not working in hardware
on
FPGA, SoC, And CPLD Boards And Kits
.
07-22-2020
09:59 AM
Posted
Re: Re:QSFP module on Stratix10 MX dev kit
on
FPGA, SoC, And CPLD Boards And Kits
.
07-06-2020
06:11 AM
Posted
QSFP module on Stratix10 MX dev kit
on
FPGA, SoC, And CPLD Boards And Kits
.
07-03-2020
01:55 AM
Posted
Re: Goal: 1GbE on Stratix 10 MX dev kit. With the Triple-Speed Ethernet IPcore (10/100/1000-Mbps Ethernet MAC and 1000BASE-X/SGMII PCS with Optional PMA) the GXB option is not available in Intel Stratix 10 devices. How to get this done via QSFP?
on
FPGA Intellectual Property
.
04-06-2020
01:24 PM
Posted
Goal: 1GbE on Stratix 10 MX dev kit. With the Triple-Speed Ethernet IPcore (10/100/1000-Mbps Ethernet MAC and 1000BASE-X/SGMII PCS with Optional PMA) the GXB option is not available in Intel Stratix 10 devices. How to get this done via QSFP?
on
FPGA Intellectual Property
.
03-27-2020
12:48 PM
Latest posts by AleCampla
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Posted
S10 MX PHY: signal rx_is_lockedtodata unstable during hardware test
FPGA, SoC, And CPLD Boards And Kits
108
09-03-2020
08:20 AM
Re: Re:QSFP module on Stratix10 MX dev kit
FPGA, SoC, And CPLD Boards And Kits
105
09-03-2020
07:41 AM
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
FPGA, SoC, And CPLD Boards And Kits
131
09-03-2020
07:37 AM
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
FPGA, SoC, And CPLD Boards And Kits
184
07-23-2020
08:24 AM
Re: Re:Stratix 10 1G/2.5G Ethernet reconfiguration not...
FPGA, SoC, And CPLD Boards And Kits
192
07-23-2020
07:03 AM
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Member Profile
Postdoc researcher in Physics at the Niels Bohr Institute, at Copenhagen University. FPGA firmware developer for the ATLAS experiment at CERN in Geneva.
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Member Since
04-15-2019