I am analysing my program to findthe biggest bottleneck.
When sampling with V-Tune for2nd-level cache load misses I see a certain number that I want to relate to clock cycles to see how much time the processor is waiting for data. Is there anyway to find out how much penalty cycles should be taken for such a lvl2 cache miss ?
I am using a Pentium4 with 512 kbyte lvl2 cache, 512 Mbyte of DDR memory.
