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Can arguments of pac_hssi_e10.c cover all settings in design example eth_e2e_e10?

 

Hello Sir/Madam,

 

To run design example eth_e2e_e10, we can use pac_hssi_e10 with some argument to configure part of the parameters, but not all of them.

We can assign below value in design example like

"    pac_hssi_e10 [-h] [-b <bus>] [-d <device>] [-f <function>] [-s Src. MAC]\n"

"                 [-m Dest. MAC] [-p Number of packets] [-l Packet length] -a action\n\n"

"        -h,--help          Print this help\n"

"        -b,--bus           Set target bus number\n"

"        -d,--device        Set target device number\n"

"        -f,--function      Set target function number\n"

"        -c,--channel       Set HSSI channel (0 - 3)\n"

"        -s,--src_mac       Set Source MAC (in the format AA:BB:CC:DD:EE:FF)\n"

"        -m,--dest_mac      Set Destination MAC (in the format AA:BB:CC:DD:EE:FF)\n"

"        -p,--packets       Total number of packets (in hex format e.g. 0x100)\n"

"        -l,--pkt_len       Packet length bytes (in hex format e.g. 0x100)\n"

"        -a,--action        Perform action:\n\n"

"          stat             Print channel statistics\n"

"          stat_clear       Clear channel statistics\n"

"          loopback_enable  Enable internal channel loopback\n"

"          loopback_disable Disable internal channel loopback\n"

"          pkt_send         Send packets\n"

 

I have not found below settings with address can be configure through pac_hssi_e10

 

parameter ADDR_RANDOMLENGTH = 8'h1;

 parameter ADDR_RANDOMPAYLOAD = 8'h2;

 parameter ADDR_START              = 8'h3;

 parameter ADDR_STOP                = 8'h4;

parameter ADDR_RNDSEED0     = 8'ha;

 parameter ADDR_RNDSEED1     = 8'hb;

 parameter ADDR_RNDSEED2     = 8'hc;

 

Is there an enhanced version or any other way to configure these parameters?

 

Thanks

 

Jim

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Hi Jim,

 

Sorry for any confusion. I would like to seek further clarification on the following to ensure we are on the same page:

 

1. Mind further elaborate on the specific example design eth_e2e_e10 that you are using? Some web link would be helpful further further understanding.

 

2. What is the FPGA device and Quartus version that you are using?

 

3. Are you using any Intel devkit? If yes, please help further elaborate.

 

4. I notice pac_hssi_e10 in your description. Just wonder if you are using any PAC card?

 

Please let me know if there is any concern. Thank you.

 

Best regards,

Chee Pin

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Hi Chee Pin,

 

thanks for your feedback. I am using Intel PAC Arria10gx dev kits.

 

The design example I mentioned is under OPAE installation directory. root/inteldevstack/a10_gx_pac_ias_1_2_pv/hw/samples/eth_e2e_e10/

 

I have done some PAC test with Quartus 17.1 on centos 7.

my question is about design example provided by Intel

Best regard

 

jim

 

 

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Hi Jim,

 

Thanks for your clarification. I will help to route this to our PAC team for further assistance. Thank you,

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Hi,

 

May I know where do you get the information regarding the below setting?

 

parameter ADDR_RANDOMLENGTH = 8'h1;

 parameter ADDR_RANDOMPAYLOAD = 8'h2;

 parameter ADDR_START             = 8'h3;

 parameter ADDR_STOP               = 8'h4;

parameter ADDR_RNDSEED0    = 8'ha;

 parameter ADDR_RNDSEED1    = 8'hb;

 parameter ADDR_RNDSEED2    = 8'hc;

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Hi JohnT,

 

Thanks for your feedback and feedback.

 

I found some parameter in design file avalon_st_gen.v in the location ..\examples\eth_e2e_e10\hw\rtl\e10\eth_traffic_controller\

 

Parameters lists start from line 63 as below , and they are supposed to be set up by the avalon-mm interface

 

// ___________________________________________________________

 //      address parameters

 // ___________________________________________________________

 parameter ADDR_NUMPKTS       = 8'h0;

 parameter ADDR_RANDOMLENGTH = 8'h1;

 parameter ADDR_RANDOMPAYLOAD         = 8'h2;

 parameter ADDR_START              = 8'h3;

 parameter ADDR_STOP                = 8'h4;

 parameter ADDR_MACSA0                   = 8'h5;

 parameter ADDR_MACSA1                   = 8'h6;

 parameter ADDR_MACDA0                  = 8'h7;

 parameter ADDR_MACDA1                  = 8'h8;

 parameter ADDR_TXPKTCNT      = 8'h9;

 parameter ADDR_RNDSEED0     = 8'ha;

 parameter ADDR_RNDSEED1     = 8'hb;

 parameter ADDR_RNDSEED2     = 8'hc;

 parameter ADDR_PKTLENGTH   = 8'hd;

 

 parameter ADDR_CNTDASA         = 8'hf0;

 parameter ADDR_CNTSATLEN     = 8'hf1;

 parameter ADDR_CNTDATA         = 8'hf2;

 parameter ADDR_CNTTRNSTN    = 8'hf3;

 

and in line 180 in the same file, we can see the parameter random_payload being configure by the writedata as below

 

always @ (posedge reset or posedge clk)

  begin

     if (reset) random_payload <= 1'h0;

     else if (write & address == ADDR_RANDOMPAYLOAD) random_payload <= writedata[0];

  end

 

,but if you check pac_hssi_e10.c in the location ..\examples\eth_e2e_e10\sw\

You can not find c code to configure this parameter unless you do it by yourself.

 

Thanks

 

Jim  

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Hi,

 

This parameter is being connected to the Address decoder in the RTL which will be control by the CSR register that CCIP will be able to control it. We have only enable certain function to work on the reference design as it is what it is implemented. You may check on "ccip_std_afu.sv" on how the CSR is being set and check on "Address Decoder" module on how it is mapped to the ethernet IP.

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