Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs

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Hi, my team developed intel FPGA (Cyclone 10 and Arria) based board with GDDR5 (HBM). I'm new to this kind of hardware. I want to understand its possibilities, applications, software stack and possible ways of selling. It's also possible to cooperate with interested ones.


As I see the ready solution is openVINO - just upload supported trained neural network model and it works. But what if we need custom logic. Ideally to use popular frameworks - TensorFlow, PyTorch, sklearn. But only some neural networks are supported and other types of ML are not supported.

So here we need to implement it ourselves. And here is uncertainty. How to do this? Is it enough to write logic on DPC++ or one must develop design with Intel Quartus Prime Design and only then to write DPC++. But what's the guideline to design with Quartus Prime according to building solution?

What for is CodePlay ComputeCPP project?

Is it possible to join Intel FPGA Design Solutions Network to distribute only our acceleration board?

I'm sorry for maybe foolish questions but there is not enough structured information.


Thank you for your attention

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For the design partner request, I would recommend you to submit your request through


For OpenVINO ML, we only support fixed bitstream on FPGA which only support Intel PAC with Intel Arria® 10 GX FPGA

and Mustang F100 Arria 10 ( board. You may used any method to interface with the FPGA which utilize the IEPlugin features.

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