Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
477 Discussions

Facing Partial reconfiguration error, "Error(18853): Running Synthesis on a partial reconfiguration design at the implementation revision is illegal."

UTech
Beginner
691 Views

Hi,

 

I'm trying to generate a GBS file for my custom AFU.

 

Once the build_synth folder is created by using "afu_synth_setup -- source /path/to/filelist.txt build_synth", I'm opening dcp.qpf(cd build_synth/build) in Quartus GUI and running compilation.

 

In Analysis and Synthesis, I'm getting the following error related to Partial Reconfiguration.

Error(18853): Running Synthesis on a partial reconfiguration design at the implementation revision is illegal.

 

Technical Details:

Software : Quartus Prime Pro 17.1.1

FPGA : Intel Arria X (10AX115N2F40E2LG)

 

Any suggestions on resolving this error will be helpful.

 

Thank you.

0 Kudos
2 Replies
RichardTanSY_Intel
522 Views

Hi, the error implies that we do not run synthesis on a partial reconfiguration design at the implementation revision.

AN 797: Partially Reconfiguring a Design could guide you on the compilation flow for PR design.

0 Kudos
UTech
Beginner
522 Views
0 Kudos
Reply