I am running the original vendor design example eth_e2e_e10 on Intel PAC aria10gx.
I wonder the 2 design file e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt were not included in the design compilation.
what I have done was
I open the Quartus GUI and open the /root/inteldevstack/a10_gx_pac_ias_1_2_pv/hw/samples/eth_e2e_e10/build_synth/build/dcp.qpf.
I could located the GEN and MON module in the hierarchy view of grren_bs, and found the relative design files been used in this project were in below location
I have check the comparing the design file between avalon_st_gen.v and e10_avl_st_gen.v, they are similar but not exactly same.
Could you tell me if e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt be included in compilation of original vendor design example eth_e2e_e10? if not ,can we just remove them from filelist?
May I know more detail about that ?what that 2 files for ?
and what is the diffrentce comparing to below 2 files
Avalon_st_gen.v is the Avalon ST Generator and Avalon_st_mon.v is the monitor IP. It is a IP used to performed traffic validation on your system.
The e10_avl_st_gen.v and e10_avl_st_mon.v is the high level design which will call the the Avalon_st_gen.v and avalon_st_mon.v file in order to incorporate the Ethernet validation using the Avalon ST packet.
Thanks for your feedback.
May I know where can I find this parent-child relationship between these similar but diffrent module?
I have fond the parent module of Avalon_st_gen.v and eth_std_traffic_controller_top, is eth_std_traffic_controller_top from the synthesis view under ccip_std_afu/prz0/lp0..eth/gen_mon_inst/
I have not found the top module of avalon_st_gen being installed in e10_avl_st_gen.v. Also I have not found the parent module of e10_avl_st_gen.v, not sure if they visitble for customer?
and not sure how the e10_avl_st_gen.v call the avalon_st_gen without installing it in source code?
I am bit confused about that file.
I have compared them, found the very similar even in sub modules architecture.
After further checking and investigation, the e10_avl_st_gen and e10_avl_st_mon is for simulation purpose. while the avalon_st_gen and avalon_st_mon is for hardware implementation.