I completed the tutorial found here: https://www.intel.com/content/www/us/en/programmable/support/training/course/ohls7.html
Everything worked fine, except for Part 7. Compilation (make test-fpga) works for me, however when I run the simulation (./test-fpga) the simulation never finishes (I had it running for hours with no results), even though the tutorial guide says it is only supposed to take a few minutes. I have the same problem in an application I am developing. It seems that the simulator might be getting stuck somewhere when the workload is somewhat larger.
Has anyone else encountered that problem? I also wanted to ask if it is possible to view the simulation display signals in ModelSim during the time of execution to see if it gets stuck somewhere, because I don't see .wlf file being created during runtime and I don't know of any other methods to see the stage of simulation.
Thank you in advance.
May I know the informationas below:
In the description " I run the simulation (./test-fpga)", may I know the full command you had used?
According to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/ug-hls-getting-start... in chapter 1.3 steps 7, do you have install the required 32-bit library?
Also, the HLS compiler instructs the simulator not to log any signals in default because logging signals slows the simulation, and the waveforms files can be very large. However, you can configure the compiler to save these waveforms for debugging purposes with steps and command in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/ug-hls.pdf chapter 6.2.
Hello, thank you for your reply.
1) The OS version is Debian GNU/Linux 9 (stretch) 64-bit, and the kernel version is 4.9.0-12-amd64. The system has an Intel Core i7 CPU 920 and 24GB or RAM.
2) The HLS compiler is version 19.3 pro edition.
3) The compilation has no error messages. The compilation completes successfully and outputs a reports.html file with all the information about resource utilization, Initiation intervals etc. However, it has no information about
latency or memory arbitration, because the simulation has not yet run.
To compile the simulation I used the Makefile provided. For compilation I used:
i++ -march=Arria10 --fpc --fp-relaxed -o test-fpga (with the sources files included as well. I also tried Stratix10 which is my target platform. Also the compiler output a warning about the --fpc and --fp-relaxed flags, instructing me to replace them with -ffp-contract=fast and -ffp-reassoc, which i did. Nothing changed when I altered or completely removed the flags).
Regarding the Modelsim simulator, it is properly set up (I already used it in the previous examples of the tutorial, which were all working perfectly). I am not using the -ghdl flag in the case of the QRD, so no waveform files are generated.
However, when I run the simulation (both in the case of the QRD example in the tutorial and in the case of the project I am working now) there is no progress. No error messages are printed. In the case of the QRD, only output is the first input matrix, which is printed at the beginning of the testbench. No other output is printed, even after letting it run for hours. This indicates that the simulator is stuck somewhere.
My question regarding the waveforms was if there is some way of seeing the logging signals on-the-run (while the simulation is runing), rather than having to wait until it is finished, in order to be able to see if it gets stuck somewhere and why.
May I know the information below:
Also, I am checking the information internally with developer.
According to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/mnl-hls-reference.pd... in page 9, could you try the command with simulator option.
--simulator none multiplier.c
Hello, thanks for your response.
1) Modelsim I have is FPGA edition version 2019.2
2) GCC version is 8.3.0
Using the --simulator none flag, the compilation works correctly and the report.html is successfully generated. However, there is no executable generated, because the testbench is omitted.
The compilation also works for me even when I specify the simulator to Modelsim, and a report.html file is also generated, without informaton about the verification statistics (latency etc.).
What doesn't work is the execution of the testbench that is generated by the compilation:
i++ MGS.cpp QRD_Testbench.cpp TestbenchHelpers.cpp -v -ffp-contract=fast -ffp-reassoc -march=Stratix10 -o -test-fpga
To execute the testbench I then run:
However, the execution generates no outputs (aside from the printing of the first input matrix) and never terminates.
The MGS.cpp, QRD_Testbench.cpp and TestbenchHelpers.cpp files are in Part 7 of the tutorial (QRD decomposition).
I have a quick followup. I tried changing the floating-point precision from double to single on the project that I am working on, and the simulator is working now. However, it gets very slow as the design grows large,
for example by increasing the unrollin factor of my main loop, but I guess this is expected, as the amount of hardware that gets simulated rises exponentially in complexity.
I do not know yet if the single precision is going to be satisfactory for the purpose of my design, so I wanted to ask if anyone else also gets the same behavior with double precision vs single precision. Also, is there any way
of running the simulation on more than one cores?
I will also retry running Part 7 of the tutorial with single precision and see if it works. I will update you once I have the results.
Sorry for late reply.
Upon checking, the simulation could not run in multiple core. The only simulation method is Modelsim. You can simulate more quickly by using Modelsim SE (Questasim).
Upon checking with the concern team, QRD is a particularly heavy design and might possibly perform slowly if on Modelsim AE. Also, the job might be running slowly and was killed before it could finish.