Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, DLA, Software Stack, and Reference Designs
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In our project when we are migrating from Arria II GX FPGA to Arria V GZ FPGA I m facing The feature Dynamic Reconfiguration is not supported by the generic_pll for the Arria V GZ family. Can any one suggest me how to go about this ?

KRedd9
Beginner
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AnandRaj_S_Intel
Employee
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Hi KRedd9,

 

We can use Altera pll Reconfig or Altera pll from ip catalog or platform designer. which supports Dynamic Reconfiguration.

Refer below link for more information.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an661.pdf

 

Regards

Anand

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