oneAPI on DevCloud fails on building for FPGAs

[Puya]

Hi,

I have access to Intel DevCloud to try oneAPI. and I use `qsub -I` to open interactive terminal

I tried to make FPGA examples from BaseKit-code-samples , but `make fpga` shows an error

```

[ 50%] Linking CXX executable ../triangular_loop.fpga

aoc: Quartus is not on the path!

aoc: Is it installed on your system and quartus bin directory added to PATH environment variable?

/home/u34315/tmp/triangular_loop-a503a1.o: file not recognized: File truncated

clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation)

clang++: error: linker command failed with exit code 1 (use -v to see invocation)

src/CMakeFiles/triangular_loop.fpga.dir/build.make:94: recipe for target 'triangular_loop.fpga' failed

make[3]: *** [triangular_loop.fpga] Error 1

CMakeFiles/Makefile2:321: recipe for target 'src/CMakeFiles/triangular_loop.fpga.dir/all' failed

make[2]: *** [src/CMakeFiles/triangular_loop.fpga.dir/all] Error 2

CMakeFiles/Makefile2:264: recipe for target 'src/CMakeFiles/fpga.dir/rule' failed

make[1]: *** [src/CMakeFiles/fpga.dir/rule] Error 2

Makefile:183: recipe for target 'fpga' failed

make: *** [fpga] Error 2

```

If I source

init_opencl.sh

from different pre-installed quartus version I get version incompatibility error.

Could you please tell me which script should I source exactly to be able to use installed PAC on the DevCloud?

Also `aocl diagnose all` shows this message:

```

--------------------------------------------------------------------

ICD System Diagnostics                                             

--------------------------------------------------------------------

Using the following location for ICD installation:

   /etc/OpenCL/vendors

Found 4 icd entry at that location:

   /etc/OpenCL/vendors/Intel_FPGA_SSG_Emulator.icd

   /etc/OpenCL/vendors/Altera.icd

   /etc/OpenCL/vendors/intel-cpu.icd

   /etc/OpenCL/vendors/intel-neo.icd

the following OpenCL libraries are referenced in the icd files:

   libintelocl_emu.so

   libalteracl.so

   libintelocl.so

   libigdrcl.so

checking LD_LIBRARY_PATH for registered libraries:

   libintelocl_emu.so was registered on the system at /opt/intel/inteloneapi/compiler/2021.1-beta03/linux/lib/oclfpga/host/linux64/lib

   libalteracl.so was registered on the system at /opt/intel/inteloneapi/compiler/2021.1-beta03/linux/lib/oclfpga/host/linux64/lib

   libintelocl.so was registered on the system at /opt/intel/inteloneapi/compiler/latest/linux/lib/x64

   libigdrcl.so was registered on the system at /opt/intel/inteloneapi/compiler/latest/linux/lib/oclgpu

Using the following location for fcd installations:

   /opt/Intel/OpenCLFPGA/oneAPI/Boards

ERROR: no FCD entry at that location. Without ICD and FCD, host executables must be linked directly to Intel FPGA runtime (libalteracl) and BSP MMD library instead of to the khronos ICD library (libOpenCL).

   To use FCD, Please reinstall using aocl install

--------------------------------------------------------------------

ICD diagnostics FAILED                                             

--------------------------------------------------------------------

--------------------------------------------------------------------

BSP Diagnostics                                                    

--------------------------------------------------------------------

/opt/intel/inteloneapi/compiler/2021.1-beta03/linux/lib/oclfpga/board/intel_a10gx_pac/linux64/libexec/diagnose: error while loading shared libraries: libopae-c.so.1: cannot open shared object file: No such file

```

It is my user ID in DevCloud : u34315@s001-n093

[MEIYAN_L_Intel]

Hi,

May I know which link you are referring?

Also, I would like to know which toolkit you are using on DevCloud?

Can you list flow and command you have used?

Thanks

[Puya]

@MeiYanL_Intel​ 

ssh devcloud  git clone https://github.com/intel/BaseKit-code-samples.git qsub -I source /opt/intel/inteloneapi/setvars.sh #As aoc for fpga needs quartus_hls to be on path I put quartus 18 bin directory on path, quartus 17 does not support OpenCL export PATH=$PATH:/glob/development-tools/versions/intelFPGA_pro/18.1/quartus/bin/ cd ~/BaseKit-code-samples/DPC++Compiler/FPGATutorials/BestPractices/n_way_buffering mkdir build cd buid cmake .. make fpga_emu ./n_way_buffering.fpga_emu # everything works fine on emulation but using make fpga make fpga # the following error appears, it requires Version 17.1.1 but when I put quartus 17.1 on path it complains that quartus 17 does not support this flow..

Output:

Scanning dependencies of target fpga [ 50%] Generating dev_fpga.o [100%] Generating n_way_buffering.fpga aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the oneAPI FPGA Optimization Guide for information on performance tuning applications for FPGAs. Error (18640): The Quartus Partition Database File '/home/u34315/tmp/dev_fpga-1c52cd/build/dcp.qdb' was generated using version 'Version 17.1.1 Build 273 12/19/2017 SJ Pro Edition', which cannot be read by the current version of the Quartus Prime software. Regenerate '/home/u34315/tmp/dev_fpga-1c52cd/build/dcp.qdb' using the current version of the Quartus Prime Software. Error (19296): Cannot load none snapshot - ensure the design has been compiled through all earlier stages. Error (19829): dcp.qdb cannot be assigned. The dcp.qdb file is missing Partial Reconfiguration or Reserved Core subpartitions and assigned to the root partition. In order to assign a QDB file to the root partition, it must be created from a design using Partial Reconfiguration or Reserved Core subpartitions. To correct this error, ensure that the creation and assignment of the QDB is correct. Error (18640): The Quartus Partition Database File '/home/u34315/tmp/dev_fpga-1c52cd/build/bsp_interface.qdb' was generated using version 'Version 17.1.1 Build 273 12/19/2017 SJ Pro Edition', which cannot be read by the current version of the Quartus Prime software. Regenerate '/home/u34315/tmp/dev_fpga-1c52cd/build/bsp_interface.qdb' using the current version of the Quartus Prime Software. Error: Flow failed: Error (23035): Tcl error: Error (23031): Evaluation of Tcl script compile_script.tcl unsuccessful Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings Error (23035): Tcl error: Error (23031): Evaluation of Tcl script build/entry.tcl unsuccessful Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings Error: Compiler Error, not able to generate hardware   /home/u34315/tmp/dev_fpga-da14fa.o: file not recognized: File truncated clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation) clang++: error: linker command failed with exit code 1 (use -v to see invocation) src/CMakeFiles/fpga.dir/build.make:60: recipe for target 'src/n_way_buffering.fpga' failed make[3]: *** [src/n_way_buffering.fpga] Error 1 CMakeFiles/Makefile2:224: recipe for target 'src/CMakeFiles/fpga.dir/all' failed make[2]: *** [src/CMakeFiles/fpga.dir/all] Error 2 CMakeFiles/Makefile2:231: recipe for target 'src/CMakeFiles/fpga.dir/rule' failed make[1]: *** [src/CMakeFiles/fpga.dir/rule] Error 2 Makefile:170: recipe for target 'fpga' failed make: *** [fpga] Error 2

 I also append the result of aocl list-devices command:

u34315@s001-n121:~$ aocl list-devices /opt/intel/inteloneapi/compiler/2021.1-beta03/linux/lib/oclfpga/board/intel_a10gx_pac/linux64/libexec/diagnose: error while loading shared libraries: libopae-c.so.1: cannot open shared object file: No such file or directory -------------------------------------------------------------------- Warning: No devices attached for package: /opt/intel/inteloneapi/compiler/2021.1-beta03/linux/lib/oclfpga/board/intel_a10gx_pac --------------------------------------------------------------------

[MEIYAN_L_Intel]

Hi,

According to https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/acceleration-card-arria-10-gx/getting-started.html, Intel PAC with Arria 10GX FPGA have used v17.1.1 BSP.

I have to check internally about the version used in DevCloud.

Thanks

[Puya]

@MeiYanL_Intel​ 

Yes, there is written:

• Intel Quartus Prime Pro Edition Software Version: 17.1.1
• Open Programmable Acceleration Engine (OPAE) Version: 1.1.2-1

it seems devCloud FPGA toolkits are wrongly installed. and I don't have sudo access to regenerate the OpenCL BSP for newer versions of quartus. So probably another minor version of quartus 17 (maybe 17.1.1) is able to get along with opencl FPGA SDK .

Also it seems at least in my case OPAE is not installed.

Could you please let me know when the issue is resolved?

[MEIYAN_L_Intel · Accepted solution]

Hi, 

I have try to run compile the with FPGA emulator and hardware with the command as below: 

ssh decloud

git clone https://github.com/intel/BaseKit-code-samples.git

qsub -I -l nodes=1:fpga:ppn=2 -d .

cd BaseKit-code-samples/DPC++Compiler/vector-add/

vi build_fpga_emu.sh 

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make fpga_emu -f Makefile.fpga

vi run_fpga_emu.sh 

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make run_emu -f Makefile.fpga

vi build_fpga_hw.sh 

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make hw -f Makefile.fpga

vi run_fpga_hw.sh 

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make run_hw -f Makefile.fpga

qsub -I -l nodes=1:fpga:ppn=2 -d . build_fpga_emu.sh 

qsub -I -l nodes=1:fpga:ppn=2 -d . run_fpga_emu.sh 

qsub -I -l nodes=1:fpga:ppn=2 -d . build_fpga_hw.sh 

qsub -I -l nodes=1:fpga:ppn=2 -d . run_fpga_hw.sh 

I have saw the output is success by using command "cat".

I will check internally with the related information again.

Thanks

[Puya]

@MeiYanL_Intel​ 

In this scripts I see how you assign a particular node on devcloud for FPGA execution. Apparently not all nodes on the devcloud have FPGA hardware and required tools, you assign nodes with fpga property:

qsub -I -l nodes=1:fpga:ppn=2 -d .

I rewrote my scripts modifying qsub as above .

I can compile and run applications on devcloud FPGAs now.

Thank you.

[MEIYAN_L_Intel]

Hi,

I am glad that the script can help you out from the problem.

Thanks