E810-XXVAM2

[Greif]

I AM trying to Deal with a tagged VLAN on a receive packet.

I am trying to control certain registers on the chip that will allow me to pass the receive packet with tag value without striping the tag.  

Any help would be appreciated. I am new to this E810 chip.

I have changed some fields, but I am still not getting any received messages. The incoming packet is a tag packet and I need to pass this packet thru without any stripping of the tag. 

I have set the Global Configuration (L2 Tag Control - GL_SWT_L2TAGCTRL[n]), Location 13.2.2.8.5 within the E810 document, to the following:

Global Configuration
GL_SWT_L2TAGCTRL. ETHERTYPE	0x8100
GL_SWT_L2TAGCTRL.ISVLAN   1	1
PRT_L2TAGSEN.NON_LAST_TAG	0
GL_SWT_L2TAGCTRL.INNERUP	1
GL_SWT_L2TAGCTRL.OUTERUP	0
GL_SWT_L2TAGCTRL.LONG	0
GL_SWT_L2TAGCTRL.HAS_UP	1
GL_SWT_L2TAGCTRL.ISMPLS	0
GL_SWT_L2TAGCTRL.ISNSH	0
GL_SWT_L2TAGCTRL.LENGTH	2
GL_SWT_L2TAGTXIB.OFFSET	0
GL_SWT_L2TAGTXIB.LENGTH  3	01b
GL_SWT_L2TAGRXEB.OFFSET	0
GL_SWT_L2TAGRXEB.LENGTH   3	01b
GL_SWT_L2TAGDATA0, GL_SWT_L2TAGDATA1	All zeros
Per Port Configuration (Controlled by Set Port Parameters command)
PRT_L2TAGSEN.ENABLE and GL_L2TAGSEN_m_n (m= 0..3, n= 0..1)	1

The E810 Datasheet section 7.12.3.3 states that the tag extraction rules are controlled by the following:

 VSI_TSR.STRIPTAG, VSI_TSR.SHOWTAG, and VSI_TSR.SHOWPRIONLY bit fields.

Within Table 7-290 Tag Extraction Example, the document talks about “SHOWIV and L2TSEL”:

We, have SHOWIV and L2TSEL set to a 1, 0 respectfully.  Which selects Inner VLAN on L2TAG1.

However, I believe this only pertains to different cases assuming the first tag is an STag and the second tag is a VLAN.

We don’t have a Stag only a typical 802.1 (8100) vlan tag.

If the VSI_TSR.STRIPTAG, VSI_TSR.SHOWTAG, and VSI_TSR.SHOWPRIONLY bit fields control the extraction rules how do you set this for “DO nothing” just leave the packet as is.

The setting is set as follows: 

VSI_TSR Register

VSI_TSR.STRIPTAG = 0

SHOWTAG = 0

SHOWPRIONLY = 0

VSI_TAR Register    per document 13.2.2.12.5

ACCEPTTAGGED = 0

ACCEPTUNTAGGED = 0

prt_tdpul2tagsen Register   per document 13.2.2.26.1

Enable = 1

Not sure what Table 7-292 is really saying. We have eight incoming Ports attached to an external switch which delivers the packet and tag. I don't see how the GL_L2TAGSEN_0_0 comes into play.

[Diego_INTEL]

Hello @Greif,

Thank you for contacting Intel Embedded Community.

You can try asking in the Ethernet Products Community as here is only for Embedded Products.

https://community.intel.com/t5/Ethernet-Products/bd-p/ethernet-products

But I have been investigating on my own in our resources and could be a driver issue with ice, but I'm not entirely sure, you may try updating the driver to the latest release just in case.

Also, you can check these links:

https://github.com/torvalds/linux/commit/fe911c89756671fc553d8d67836a65151e04c4d7

https://github.com/torvalds/linux/compare/master...mfijalko:linux:another61mbuf

https://github.com/mfijalko/linux/tree/another61mbuf

Best regards,

@Diego_INTEL 

[Greif]

Hi Diego,

I made a change to the driver that was given to me to use. I added the line ctxt->info.inner_vlan_flags |= ICE_AQ_VSI_INNER_EMODE_NOTHING.

It solved the problem of NOT throwing away the incoming tags, but I have no idea as to why.

I started Searching thru the code that you suggested and did not show any results on using ICE_AQ_VSI_INNER_EMODE_NOTHING.

I would really like to know why this line made the difference, However the device driver that was given to me is a half breed of Intel's driver for the E810. 

I think at this time frame I will close the issue, unless someone can shed light on ctxt->info.inner_vlan_flags.