The current release of our test board is based on I7 and the C216 Chipset.
We are mapping two CPLDs on IOports 0x700 and 0x1700 through the LPC bus.
To enable these ranges we run at startup:
"setpci -s 00:1f.0 VENDOR_ID+0x88.L=0x00fc0701" and
"setpci -s 00:1f.0 VENDOR_ID+0x8C.L=0x00fc1701".
Recently we traded the I7+Chipset for an Atom E3800 processor. With this platform the LPC bus is morphed into an PCU-LPC legacy bus.
I, no longer find in the LPC register map the BAR registers allowing me to enable IOport ranges.
QUESTION: How can I enable the IOport pages at 0x700 and 0x1700 with my new Atom architecture ?
Thank you for contacting Intel Embedded Community.
You must verify with the assistance of your BIOS developer the information stated in section 26.10, on page 106 of the https://edc.intel.com/Link.aspx?id=7010 Intel(R) Atom(TM) processor E3800-M/D SoC: BIOS Writer's Guide (Volume 2 of 2) document # 514148; and in section 2.2, on page 14 of the https://edc.intel.com/Link.aspx?id=7011 Intel(R) Atom(TM) SoC E3800-I: BIOS Writer's Guide Addendum document # 526998.
We hope that this information may help you.