The FSP TempRamInit API initialises an I/O mapped and a memory mapped base address for GPIO/PAD management.
There is 4 regions mapped to each base address (SOUTHEAST, SOUTHWEST, NORTH and EAST). The I/O mapped region is used for GPIO configuration and the memory mapped I/O for PAD configuration.
- Is it the same order of regions in both base address mappings?
- What's the order of the regions?
- Memory mapped regions: SOUTHWEST = BASE, NORTH = BASE + 8000h, EAST = BASE + 10000h, SOUTHEAST = BASE + 18000h. Correct?
- GPIO regions: ?
This will not help as the information are in BWG and not allowed in a public forum. The FSP documentation make several references to the BWG and that information is not available to me even with a CNDA. As my requests for IPS has been requested 15 times and declined 14 times, I don't have access to BWG.
The policy to have a public forum for FSP with documentation and tools can be questioned, as any boot loader or BIOS using the FSP will require the BWG. As information required for configuring GPIO and pads are left out in public documentation, the sole purpose of FSP is lost.
The propaganda about the benefit of using FSP is false as only the ones allowed access to proper documentation will be able to integrate it. As I have a CNDA and still after several request for BWG still get no help, I'm discriminated.
The community used to work and I got help in many years. I don't know what has happened with your support, but I suspect politics got in the way. In the past Intel had a passion for engineering, but it looks like they have lost in on their way.
Thank you Carlos!
I can understand why BWG needs NDA and IPS account.
The problem is that information that should be open for anyone is not available as it's only documented in BWG which has restricted access.
Consider an OS that wants to use I/O mapped GPIO. Without the documentation there is no clue of the address and bit number for a GPIO, even though the BIOS have used the memory mapped configuration space to configure the pads. The secret of how the pads are configured belong to the BWG, but how to access by BIOS configured GPIOs should be known by the OS or applications.
Thus the access information (address and bit number) of the configured GPIOs should be in public documentation. What possible harm will it do if programmers knows how to actually use the configured GPIOs for a board?
Thanks for your reply.
You should know that Intel, your company, or any companies have restricted and confidential information, which is categorized by levels.
These levels are accessible to the customers that have some CNDAs.
The document and tool mentioned in your previous communication have private and confidential information accessible to customers that own the proper CNDAs.
Due to this fact, you need the propers CNDAs to have access to them.
The RDC privileged account provided some CNDAs that give you access to some documentation. The procedure to obtain it is by filling out the form stated on the following website:
We hope that this explanation may help you to understand and solve the mentioned inconveniences.
What's a proper CNDA? I have a CNDA #013514 and it's signed as evident by Adobe Sign Document History snapshot below.
I have not been given access to any document, so what's the purpose of my CNDA? It looks proper to me! It looks the same as the previous CNDAs with Intel for Zebor Technology and Winzent Technologies. Those CNDAs gave me access to all documents including MRC source code for Cedarview and Baytrail architectures.
Thanks for your reply.
This channel is focused on answer questions related to Intel embedded devices.
Your questions are more focused on CNDAs, which is a topic totally apart from the focus on this channel.
By the way, please keep in mind that the CNDA information is restricted and should be kept private and avoid show it on a public tool like the Embedded Design Center (EDC) Community.
Based on this information, we suggest you discuss the question of your CNDA with the Intel email addresses showed in the attached document of your last communication.
On the other hand to focus this discussion on our support area, please follow our suggestion provide in our first communication to help you properly from the technical perspective.
You replied on this topic that these documents required proper CNDA as indicating you had some knowledge about it. The CNDA and all Intel privileged documentation is kept private. The photo is a log from Adobe verifying that I have a mutually signed CNDA with Intel.
As you work in Intel, you may or may not be able to find out what my CNDA is good for. At least you should be able to find out who to contact.
I have no reason to believe that my CNDA does not cover the kind of documentation I need. As Intel does not have a representative in Sweden any longer, I don't know who to contact.