EMMITSBURG ES-2: error message on BSDL

[Dickinson]

Hello:

We got a error message when we implement BSDL file by Emmitsburg_A1_2001_22x23mm_BGA749.bsdl,

here is error message and BSDL file for reference,

it's looks like multiple signal was not defined, 

such as:

Error, Line 481, Signal DMI_4_RXN was not defined in the port statement.
Error, Line 482, Signal DMI_6_RXN was not defined in the port statement.
Error, Line 494, The number of VCCP_1P05 pins does not match the port definition.
Error, Line 592, Port name length error; GPPC_S_6_SUSWARN_N_SUSPWRDNACK has more
than 28 characters.

Error, Line 45, parse error near symbol 'PONER_O'.

Error Line 45, Improper Port declaration. 

but we don't got abnormal when we implement another one,

could you please provide suggestion for this ?

[CarlosAM_INTEL]

Hello, @Dickinson:

Thank you for contacting Intel Embedded Community.

We noticed that your post provided Intel Confidential Level material, which is cover under your Non-Disclosure Agreement “NDA” with Intel. We have removed the NDA level material from this post.

We want more details to find information that may help you. Due to this fact, could you please let us the procedure that you have followed to obtain the file removed from this post?

Could you please provide pictures of the topside markings of the devices related to this situation?

We are waiting for your reply.

Best regards,

@CarlosAM_INTEL.

[Dickinson]

Hi

Here is image for topside marking when incoming inspection, 

but this symptom was detected by BSDL compiler checks , not PCH mounted,

our team use BSDL file to set in/out port for ICT test,

so we want to clarify reason for this error message ,

thanks.

[CarlosAM_INTEL]

Hello, @Dickinson:

Thanks for your update.

I want to paraphrase the unanswered question from your side, could you please clarify where and how you obtained the file deleted by us?

On the other hand, you should be sure that the devices related to this situation are not Engineering Samples (ES),  which are devices previously released than the production versions.

Best regards,

@CarlosAM_INTEL.

[Dickinson]

Hi 

thanks for your reply,

this file still can be accessed by search bar now,

it will show file(#676777) when i chose ID:626777,  not 626777,

 so our team use this file to set in/out port for ICT test,

if it's wrong file ,please inform us.

thanks.

https://cdrdv2.intel.com/v1/dl/getContent/626777

[CarlosAM_INTEL]

Hello, @Dickinson:

Thanks for your reply.

We sent an email to the address related to this account with information that may help you.

Best regards,

@CarlosAM_INTEL. 

[Dickinson]

Hello

we are follow guide as description on email,

it had fixed a half symptom now,  but it's require Intel team to clarify those question

1.  pin type for Vss/RSVD_2/VCCP_1P05_FILTERED , it will cause error message by "POWER_0" or "linkage_inout" in pin type.

2.  different type for same node, such as:VCCP_1P8 , it's require clarify reason.

3.  we need  those BSDL package for  STD_1149_1_2013.all , and STD_1149_6_2015.all, we can't found BSDL package by resource center.

thanks.

[Dickinson]

Hello

could help to confirm result as we informed on last week?

because we are use BSDL file to define pin type for ICT test on fixture,

it's require Intel team's help to fix this question.

thanks.

[CarlosAM_INTEL]

Hello, @Dickinson:

Thanks for your reply.

We have sent an email to the address associated with this account with information that may help you.

 Best regards,

@CarlosAM_INTEL.