Cyclone V GX Transceiver SIMPLE Example

[Altera_Forum]

Guys, 

 I want start from basis and basically I wish to start one Cyclone V transceiver and send a ethernet packet via TSE IP. Nothing else, I don't need NIOS II processor or other things except the minimal code to configure, reset and transmit via SGMII transceivers.   Do you know some example with this scenario? All examples I found are too complex for me at this point.  Cheers,  - Roberto

[Altera_Forum]

Hi, 

 You may want to try search through the Altera wiki to see if can find any exmaple that suit your target application.

[Altera_Forum]

Check out this wiki design example using system console to replace NIOs to ease user's understanding on the TSE configuration flow: 

 http://www.alterawiki.com/wiki/triple_speed_ethernet_with_mii/gmii_interface_hardware_test_by_using_system_console_reference_design

[Altera_Forum]

It's been a hard path try to use Cyclone V transceivers even to basic ethernet in loopback. 

 Even reading transceiver/reconfiguration controller/reset controller datasheets and looking for videos on Altera Training make all this things works together is not intuitive task. All IP cores has lot options for different fpga families and seems CycloneV GX is not on mainstream for that. So when I try to build my system on QSys I can't find some signals or I faced problems as trasceiver reconfiguration controller and TSE core don't have all signals matching between both, so I can't connect them via Qsys easily.  I'm using Cyclone V GX starter kit.  tiny007, thank you, I will try to check them. But my first look this design seems using external ethernet phy (I'm coming to think this ways should be best choice...). But for now I'm trying to make internal GX transceiver talks with TSE - this is my pain :D   cheers,

[Altera_Forum]

You can check out this AN which discuss about using embedded transceiver for TSE - https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an633.pdf. There are design examples for the AN as well.

[Altera_Forum]

Thank you ! 

 I will check it. I moved an step forward now I found the CustomPhy component on Qsys as hidden component! This ip core signals make sense.  Just for record for someone else: to show hidden components you will need start qsys with --debug option and right click on library to chose "show hidden components".  Cheers!