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PTP Adapter Error

Balkesh
Beginner
284 Views

I got the following error while compiling the program by choosing the component like rx port of Hard IP with ptp TOD Syncroniser and tod clock in order to provide timestamp to process the data in fifo at a rate of 400G through MAC Segmented Interface.


Error(22627): Cannot find PTP adapter for the block eth_f_0|eth_f_0|hip_inst|x_bb_f_ehip|x_bb_f_ehip_rx.

Kindly resolve my problem,

thanks

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5 Replies
Simon-Intel
Employee
237 Views

Hi Balkesh,


Thank you for reaching out to the Intel community. We acknowledge receipt of your concern and want to assure you that assisting you is our top priority. To effectively troubleshoot the issue you're facing, we need some additional information from you.

Could you kindly provide the following details?

  1. Product details
  2. Was it purchased with the system or as an add-on?
  3. A brief explanation of the issue


Your prompt response with this information will greatly assist us in diagnosing and resolving the issue as quickly as possible.


We look forward to hearing from you soon.


Best regards,

Simon

Intel Customer Support


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Simon-Intel
Employee
179 Views

Hi Balkesh,

 

Good Day!

 

This is the first follow-up regarding the issue you reported to us.

 

We wanted to inquire whether you had the opportunity to provide the details requested in our previous message.

 

Feel free to reply to this message, and we'll be more than happy to assist you further.

 

Regards,

Simon



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Balkesh
Beginner
160 Views

Hi @Simon-Intel,

Thank you for replying to my query. Actually  I configuring F tile Ethernet Hard IP in Platform Designer using Agilex 7 I series Board as I have purchased will be delivered next month. 
As i was configuring F-tile Hard IP in platform designer with enabled ptp option in order to provide time stamp to upcoming packets. 

Balkesh_0-1720496812782.png

The above figure shows the connections of ethernet ip. But when i am compiling the project in quartus, it is showing this error.

Error(22627): Cannot find PTP adapter for the block eth_f_0|eth_f_0|hip_inst|x_bb_f_ehip|x_bb_f_ehip_rx.

Any suggestions to rectify this error.  I am referring Intel Agilex 7 F Tile Hard IP user guide document.

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Sazirah
Employee
154 Views

Hi Balkesh,


Thank you for your response. We are currently checking on this and will get back to you soon.


Regards,

Sazzy_Intel


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Simon-Intel
Employee
139 Views

Hello Balkesh,

 

Good Day and thank you for your response.

 

As your issue is related to Intel® Agilex™ 7 F-Tile Ethernet Hard IP. Please post your query at our dedicated FPGA Team Community.

 

Regards,

Simon

Intel customer support


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