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cphil4
Beginner
1,355 Views

XL710 poll-mode fix in PF driver incomplete?

We have a polling XL710 VF driver and have found the appropriate poll-mode workaround in the DPDK. We are however not using the DPDK and are relying on the accompanying fix made to the latest Intel PF Linux drivers eg version 1.3.49. However this fix does not work and we believe it is incomplete. The part we are referring to involves the clearing of the DIS_AUTOMASK_N flag in the GLINT_CTL register. The code in the above release (and earlier ones) is: (i40e_virtchnl_pf.c: 344)

if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&

(vector_id == 0)) {

reg = rd32(hw, I40E_GLINT_CTL);

if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {

reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;

wr32(hw, I40E_GLINT_CTL, reg);

}

We believe this should say:

if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING)

&& (vector_id == 1) {

reg = rd32(hw, I40E_GLINT_CTL);

if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {

reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK |

I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK);

wr32(hw, I40E_GLINT_CTL, reg);

}

}

With the above changes the fix then works.

The addition of the I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK is as per the datasheet S 8.3.3.1.4.2.

The test for vector_id == 1 is because the default MSIX vector is 1. However there is a good argument for removing this test altogether since the vector involved depends on the VF implementation. Note that the fix in the DPDK eliminates this test.

We would appreciate it if you could verify the above and make changes to the released PF driver.

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5 Replies
st4
New Contributor III
111 Views

HI clivep,

Thank you for the information and clarification on this. We will raise this to the appropriate department to check on this and what is the exact XL710 network adapter model you used? Please provide the exact model (is it onboard NIC or separate network adapter?).

rgds,

wb

cphil4
Beginner
111 Views

The XL710 is a 2-port adapter card, firmware-version: 4.53 0x80001d18 1.108.0.

st4
New Contributor III
111 Views

Hi clivep,

Than you for the info.

rgds,

wb

st4
New Contributor III
111 Views

Hi Clivep,

Apologize for the delay. Further checking , you can contact the sourceforge mailing list at https://sourceforge.net/p/e1000/mailman/?source=navbar https://sourceforge.net/p/e1000/mailman/?source=navbar to get direct feedback from the developer community.

rgds,

wb

cphil4
Beginner
111 Views

Thanks Sandy.

Would it be possible to get a description of the bits in the GLINT_CTL register? The data sheet contains no details at all. It would really help us try to figure out a polling workaround that does not disrupt non-polling traffic.

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