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Hi, all:
I have two questions:
- How to increase number of interrupts of vf?
After X710 open SR-IOV, by default vf has only 4 queues and interrutps max. From [x710 datasheet](https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xl710-10-40-controller-datasheet.pdf) , after we change the I40E_DEFAULT_QUEUES_PER_VF from default 4 to 16 in /i40e-2.4.10/src/i40e.h, and change the I40EVF_MAX_REQ_QUEUES from default 4 to 16 in 40evf/src/i40evf.h, we can check vf's combined queue is 16 by using ethool -l, the queue's number is adjustable.
The problem is allocated for vf's interrupts is still 4 by check in /proc/interrupts. From datasheet 7.5.1, allocated for vf's interrupts's number is by reading from nvm. So we change num_vf_int's value by hardcode instead of reading from NVM in i40e/src/i40e_common.c, But vf's interrupts number didn't change.
So how to change vf's interrupt number for suiting with vf's queue?
- Change vf's max queue to 16 example
By using method changing vf's queue to 16, we insert the vf into OVS+DPDK. Because DPDK didn't need interrupts, we can check vf's 16 receive queues in OVS, by now it's work well. I want to ask do you have test this scene or any clients that have used this before?
I find [i40evf maximum RSS queues reasoning](https://forums.intel.com/s/question/0D50P0000490Wa0SAE/i40evf-maximum-rss-queues-reasoning) in community, we didn't use DCB and the post is no longer reply
Nic's information:
- Hardware: Intel Corporation Ethernet Controller X710 for 10GbE SFP+ [8086:1572]
- Driver: i40e-2.4.10, firmware-version: 6.01 0x80003859 1.1892.0
- i40evf-3.5.13
- Kernel: 4.9.0-0.bpo.6-amd64
Wish for replying!
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Hi, Whybe T,
Thx for replying!
Yes.
After changing vf's queue to 16 then insert into OVS+DPDK, performance was significantly enhanced. But we didn't find any paper or information to supporting these, we are afraid it may have some trouble but we didn't find yet. So we want to make sure whether it is a valid method.
Best Regards.
Pluck
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Hi, Whybe T,
Thx for replying!
Your reply is very useful!!!
From [x710 datasheet](https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xl710-10-40-controller-datasheet.pdf) page 817:
> The “table size” parameters is loaded from a global MSI_X_PF_N and MSI_X_VF_N parameters in the GLPCI_CNF2 register (loaded from the NVM), shared for all PFs and all VFs respectively.
Can we increase interrupt number by upgrading NVM or Intel would support this in future?
Best Regards.
Pluck
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